Graphenea Foundry releases the GFET S31 and a GFAB process flow for passivated, top-gated and double-gated devices
Graphenea Foundry is pleased to announce the release of its GFET S31, as well as a process flow within its foundry (PF3B) to manufacture customized top-gated HKMG solid-state graphene devices.
The GFET S30, released merely two months ago, is a backgated device, which enables the local modulation of conductance but also channel functionalization/sensitization. This is a great platform to explore VOC sensing, to prototype photodetectors and other optoelectronic devices. There are however other applications, such as RF devices, frequency doublers and certain types of detectors which require rigid control of both the Dirac point and the hysteresis. The novel GFET S31 and PF3B provide just that, by making use of an additional top gate on top of a high-K dielectric.
Figure: A double-gate scheme that can readily be implemented with the GFET S31. The black strip on top of the SiO2 is the graphene; the blue strip on top of graphene is the high-K dielectric. The common ground electrode for both gates is key to avoiding transistor body effects.
Because the device has a local gated structure, one can still locally modulate the conductance of the graphene channel. The high-K gate dielectric has an EOT of 20 nm, which results in Dirac points well below 5 V for low-voltage operation. Furthermore, the dielectric passivation greatly improves the hysteretic behaviour compared with conventional non-passivated devices, achieving stable Dirac point operation with minimal drift and hysteresis.
Figure: Dirac point shift after 10 backgate cycles (left) and hysteresis values after 10 backgate cycles (right). The gate sweep window is 5 V and gate sweep ratio is 100 mV/sec, with a source-drain voltage of 20 mV. Data shown for 6 devices on the same die.
This versatile structure enables double-gate operation, in the same fashion as Silicon-On-Insulator devices. Independently biasing the doped-Si substrate and the top-gate electrode, global (with the Si backgate) and local (with the metal top-gate) modulation of the Fermi level can be achieved. This enables transistor operation in, for instance, both p- and n- branches of the transfer curve independently. Such p- and n- operation is the basis of the inverter, a basic building block in today’s electronics.
In conclusion, this new technological advancement paves the way for more complex operation modes with graphene solid state devices, unlocking applications where a tight, reliable and durable electrostatic control of the Dirac point is needed.
