Monolayer Graphene on SiO2/Si (10 mm x 10 mm) - Pack 4 units
Monolayer Graphene 10 mm x 10 mm on SiO₂/Si - Pack 4 units - Processed in Clean Room Class 1000
Monolayer Graphene produced by CVD on copper catalyst and transferred to a SiO2/Si substrate using wet transfer process.
This product is ideal for R&D departments and universities.
- · Transparency: > 97 %
- · Coverage: > 95%
- · Thickness (theoretical): 0.345 nm
- · FET Electron Mobility on Al2O3: 2000 cm2/Vs
- · Hall Electron Mobility on SiO2/Si: 2000-3500 cm2/Vs
- · Sheet Resistance: 450±40 Ohms/sq (1cm x1cm)
- ·Grain size: Up to 10 μm
- · Dry Oxide Thickness: 300 nm (+/-5%)
- · Type/Dopant: P/Bor
- · Orientation: <100>
- · Resistivity: <0.005 ohm·cm
- · Thickness: 525 +/- 20 μm
- · Front surface: Single Side Polished
- · Back Surface: Etched
- · Particles: <firstname.lastname@example.org μm
Our Graphene Oxide is subjected to a rigorous QC in order to ensure a high quality and reproducibility.
- · Raman Spectroscopy: I(G)/I(2D)<0.7; I(D)/I(G)<0.05
- · Optical Microscopy inspection of each individual sample to ensure good transfer quality and purity
If your application requires more specific quality control, please do not hesitate to contact us.
Graphene research, Graphene transistors and electronic applications, Graphene optoelectronics, plasmonics and nanophotonics. Graphene photodetectors (measure photon flux or optical power), Biosensors and bioelectronics, Aerospace industry (electronics, thermal interface materials, etc.), MEMS and NEMS
“Recent advances in graphene-based biosensors”, 2011; doi: 10.1016/j.bios.2011.05.039. “Optical nano-imaging of gate-tunable graphene plasmons”, Nature 487, 77-81 (05 July 2012), vol. 487, page 77, doi: 10.1038/nature11254 "Graphene Frequency Multipliers", Electron Device Letters, IEEE, vol. 30, Issue:5; doi: 10.1109/LED.2009.2016443
Frequently Asked Questions
A: It has to be done under dry conditions. When using wafers such as Si or quartz a diamond pen can be used to cleave it. In order to protect the graphene film from debris, we recommend doing it with the protective PMMA layer on top of graphene. In this case, we can provide you the sample with the PMMA on top.
When using thin substrates such as PEN or PEN you can easily cut them using scissors.
A: In principle, additional cleaning is not needed and you can use our graphene directly. However, thermal annealing can be applied, typically at 250-400C under inert atmosphere in order to have a cleaner graphene and to reduce absorbents on the graphene surface.
A: Our graphene on SiO2 is p-doped, with a charge carrier density of around 1013 cm-2. This intrinsic doping can be reduced by at least one order of magnitude by thermal treatments, which lower the Dirac voltage down to 40-80 V. Another alternative is using a passivation layer on top of the graphene, which prevents the presence of water between the substrate and the graphene film.
Questions and answers about this Product
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